DocumentCode :
3488778
Title :
Overview and future challenges of Floating Body RAM (FBRAM) technology for 32nm technology node and beyond
Author :
Hamamoto, Takeshi ; Ohsawa, Takashi
Author_Institution :
Center for Semicond. R&D Center, Toshiba Corp., Yokohama
fYear :
2008
fDate :
15-19 Sept. 2008
Firstpage :
25
Lastpage :
29
Abstract :
Floating body cell (FBC) is a one-transistor memory cell on SOI substrate, which aims high density embedded memory on SOC. In order to verify this memory cell technology, a 128 Mb floating body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single cell (1Cell/Bit) operation, are reviewed. Based on the experimental results, the scalability of FBC is also discussed.
Keywords :
random-access storage; silicon-on-insulator; system-on-chip; SOC; SOI substrate; floating body RAM technology; floating body cell; high density embedded memory; one-transistor memory cell; size 32 nm; CMOS process; Capacitors; Costs; Fabrication; MOSFETs; Random access memory; Read-write memory; Scalability; Signal processing; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 2008. ESSDERC 2008. 38th European
Conference_Location :
Edinburgh
ISSN :
1930-8876
Print_ISBN :
978-1-4244-2363-7
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2008.4681692
Filename :
4681692
Link To Document :
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