DocumentCode :
3488780
Title :
System-Level Verification of Embedded Operating Systems Components
Author :
Ludwich, M.K. ; Frohlich, Antonio Augusto
Author_Institution :
Lab. for Software & Hardware Integration (LISHA), Fed. Univ. of Santa Catarina (UFSC), FlorianOpolis, Brazil
fYear :
2012
fDate :
5-7 Nov. 2012
Firstpage :
161
Lastpage :
165
Abstract :
The increasing complexity of embedded operating systems is pushing their design to System-Level, leading to the convergence between software and hardware. In such scenario, it is highly desirable to verify system properties formally, regardless of whether their components are going to be implemented in software or hardware. In this paper, we introduce an approach to verify functional correctness and safety properties of embedded operating system components formally and at System-Level. In order to demonstrate our approach, we present a scheduler of an embedded operating system showing that such scheduler follows its specification regardless of the domain it is instantiated. The verified code was subsequently compiled using GCC yielding a software instance and using CatapultC yielding a hardware instance of the scheduler.
Keywords :
formal specification; operating systems (computers); program verification; scheduling; CatapultC; GCC; code verification; embedded operating system complexity; embedded operating system components; formal verification; functional correctness; hardware instance; safety property; scheduler; software instance; software-hardware convergence; specification; system property verification; system-level design; system-level verification; Contracts; Embedded systems; Hardware; Instruments; Safety;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computing System Engineering (SBESC), 2012 Brazilian Symposium on
Conference_Location :
Natal
ISSN :
2324-7886
Print_ISBN :
978-1-4673-5747-0
Type :
conf
DOI :
10.1109/SBESC.2012.39
Filename :
6473655
Link To Document :
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