• DocumentCode
    3489040
  • Title

    Architecture design of a high-performance dual-symbol binary arithmetic coder for JPEG2000

  • Author

    Rhu, Minsoo ; Park, In-Cheol

  • Author_Institution
    Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
  • fYear
    2009
  • fDate
    7-10 Nov. 2009
  • Firstpage
    2665
  • Lastpage
    2668
  • Abstract
    The embedded-block coding with optimized truncation (EBCOT), which consists of a bit-plane coder (BPC) and a binary arithmetic coder (BAC), is the bottleneck in realizing a high-performance JPEG2000 encoding system due to its characteristics of bit-wise processing. Although efficient architectures for BPCs have been presented, the performance of EBCOT is mainly restricted by BAC because of its sequential processing nature. In this paper, we propose a novel architecture for BAC which is based on our optimization technique named as trace pipelining. It enables parallel processing of the usual byte-out cases in BAC, and can achieve a throughput of 534 M symbols/sec, which is the highest compared to those of the previous BAC architectures.
  • Keywords
    codecs; data compression; image coding; parallel processing; pipeline processing; JPEG2000; bit-plane coder; bit-wise processing; dual-symbol binary arithmetic coder; embedded-block coding; optimization technique; optimized truncation; parallel processing; trace pipelining; Arithmetic; Block codes; Computer architecture; Delay; Design optimization; Encoding; Hardware; Parallel processing; Pipeline processing; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Image Processing (ICIP), 2009 16th IEEE International Conference on
  • Conference_Location
    Cairo
  • ISSN
    1522-4880
  • Print_ISBN
    978-1-4244-5653-6
  • Electronic_ISBN
    1522-4880
  • Type

    conf

  • DOI
    10.1109/ICIP.2009.5414131
  • Filename
    5414131