Title :
Fan-in tree analysis: a new fault isolation tool
Author_Institution :
Microprocessor Failure Anal. Group, Intel Technol., Penang, Malaysia
Abstract :
With the ever increasing complexity in IC design and with the introduction of flip chip technology, the pressing need for computer aided fault isolation (FI) is sensed. Fan-in tree is a collection of subsequent fan-in signals with respect to a given node. As such, possible failing locations can be narrowed down to nodes that reside within the fan-in tree only. Multiple fan-in trees from multiple known failing nodes can also be intersected to locate common driving nodes. This paper presents an application program that was developed for Intel standard (.sch) netlist format. The result is FTREE; a fan-in tree tool that is independent of product. This tool enhances the performance of other FA tools. For its optimum usage, proper scan node selection is required during design stage. Selection of these nodes is also presented
Keywords :
automatic testing; computer testing; flip-chip devices; integrated circuit design; integrated circuit testing; logic testing; microprocessor chips; FTREE; IC design; Intel standard netlist format; common driving nodes; computer aided fault isolation; failing locations; fan-in tree analysis; fault isolation tool; flip chip technology; known failing nodes; microprocessor fault isolation; scan node selection; Assembly; Circuit faults; Failure analysis; Flip chip; Isolation technology; Microprocessors; Notice of Violation; Pressing; Standards development; Turning;
Conference_Titel :
Semiconductor Electronics, 1996. ICSE '96. Proceedings., 1996 IEEE International Conference on
Conference_Location :
Penang
Print_ISBN :
0-7803-3388-8
DOI :
10.1109/SMELEC.1996.616446
