Folded fully depleted Bulk+ technology as a highly W-scaled planar solution

Author

Bidal, G. ; Loubet, N. ; Fenouillet-Beranger, C. ; Denorme, S. ; Perreau, P. ; Chanemougame, D. ; Laviron, C. ; Leverd, F. ; Barnola, S. ; Beneyton, R. ; Duluard, C. ; Chapon, J.D. ; Gouraud, P. ; Salvetat, T. ; Grosjean, M. ; Deloffre, E. ; Fleury, D. ;

Author_Institution

STMicroelectronics, Crolles

fYear

2008

fDate

15-19 Sept. 2008

Firstpage

210

Lastpage

213

Abstract

This work proposes a Bulk+ planar fully depleted ldquofoldedrdquo technology as an innovative cost worthy solution for upcoming low power nodes. We report a detailed fabrication method, combining advanced selective epitaxy faceting and SON (Silicon-On-Nothing) process, to provide thin film/thin BOX devices with improved transistor gain beta for a given designed footprint W_design. We compare the fabrication between <110> channel, i.e. non-rotated wafer, and <100> channel, i.e. 45deg-rotated wafer, for the same (100) surface orientation.

Keywords

epitaxial growth; low-power electronics; semiconductor device manufacture; W-scaled planar solution; advanced selective; folded fully depleted Bulk+ technology; silicon-on-nothing; thin BOX devices; thin film devices; Costs; Dry etching; Epitaxial growth; Fabrication; Germanium silicon alloys; Immune system; Semiconductor thin films; Silicon germanium; Thin film devices; Thin film transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference, 2008. ESSDERC 2008. 38th European

Conference_Location

Edinburgh

ISSN

1930-8876

Print_ISBN

978-1-4244-2363-7

Electronic_ISBN

1930-8876

Type

conf

DOI

10.1109/ESSDERC.2008.4681735

Filename

4681735