• DocumentCode
    3489647
  • Title

    Multiplierless implementation of recursive digital filters using a class of low sensitivity structures

  • Author

    Bhattacharya, Mahua ; Astola, J. ; Saramäki, T.

  • Author_Institution
    Center for Signal Process., Tampere Univ., Finland
  • Volume
    2
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    611
  • Abstract
    One of the method of reducing coefficient sensitivity is that of coefficient translation. The structure is altered in such a way that the sensitivity with respect to the modified coefficients is reduced to a great extent compared to that with respect to the original coefficients. In low sensitivity structures the modified coefficients can be realized with multipliers of shorter wordlength i.e., in fewer number bits. When these are implemented in minimum numbers of signed powers of two (MNSPT) form, we have a multiplierless implementation These implementations are not associated with increase in the order of the filter that involves more number of shift registers, data paths, control circuits, etc., and hence, an increase in complexity i.e. indirect overheads
  • Keywords
    IIR filters; digital arithmetic; digital filters; recursive filters; IIR filters; coefficient sensitivity reduction; coefficient translation; coefficient translation method; control circuits; data paths; low sensitivity structures; modified coefficients; multiplierless implementation; recursive digital filters; Band pass filters; Circuits; Digital filters; Fixed-point arithmetic; Laboratories; Low pass filters; Noise generators; Shift registers; Signal processing; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing and its Applications, Sixth International, Symposium on. 2001
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    0-7803-6703-0
  • Type

    conf

  • DOI
    10.1109/ISSPA.2001.950219
  • Filename
    950219