N-MOSFETs with inversion-layer source/drain extensions formed by cesium segregation at SiO2/Si interfaces

Author

Kimoto, Kenji ; Tada, Tetsuya ; Kanayama, Toshihiko

Author_Institution

MIRAI-ASET, Tsukuba

fYear

2008

fDate

15-19 Sept. 2008

Firstpage

338

Lastpage

341

Abstract

We fabricated a novel type MOSFET with inversion layer source/drain extensions formed by Cs implantation and segregation at SiO₂/Si interfaces beside the gate and demonstrate that it has significant immunity to short channel effect, gate induced drain leakage, and transient enhanced diffusion of channel boron impurities, compared to conventional MOSFETs. The stability of Cs in the device is also confirmed by bias-temperature-stress measurements.

Keywords

MOSFET; boron; caesium; charge exchange; diffusion; elemental semiconductors; impurities; ion implantation; segregation; semiconductor doping; semiconductor-insulator boundaries; silicon; silicon compounds; SiO₂-Si:Cs,B; channel boron impurities; charge transfer doping; gate induced drain leakage; implantation; inversion layer source extensions; inversion-layer drain extensions; nMOSFET; segregation; short channel effect; transient enhanced diffusion; Annealing; Atomic layer deposition; Boron; Charge transfer; Doping; Electrons; Impurities; Ionization; MOSFET circuits; Stability;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference, 2008. ESSDERC 2008. 38th European

Conference_Location

Edinburgh

ISSN

1930-8876

Print_ISBN

978-1-4244-2363-7

Electronic_ISBN

1930-8876

Type

conf

DOI

10.1109/ESSDERC.2008.4681767

Filename

4681767