DocumentCode :
3490588
Title :
A sampled spur free fractional frequency synthesizer and its noise analysis
Author :
Houdebine, Marc ; Dedieu, Sébastien ; Sename, Olivier ; Alamir, Mazen
Author_Institution :
ST Microelectron. Crolles
fYear :
2006
fDate :
Sept. 2006
Firstpage :
90
Lastpage :
93
Abstract :
This paper presents a new fractional frequency synthesizer architecture and its noise analysis model. The proposed analysis model takes into account the sampled behavior of the PLL. In order to validate this study, measurement results illustrate the output frequency purity and the reliability of the model
Keywords :
frequency synthesizers; noise measurement; phase locked loops; PLL; fractional frequency synthesizer; noise analysis; output frequency purity; 1f noise; Capacitors; Clocks; Frequency measurement; Frequency synthesizers; Local oscillators; Phase locked loops; Quantization; Switches; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
Conference_Location :
Montreux
ISSN :
1930-8833
Print_ISBN :
1-4244-0303-0
Type :
conf
DOI :
10.1109/ESSCIR.2006.307538
Filename :
4099711
Link To Document :
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