• DocumentCode
    3490621
  • Title

    Fault models and tests specific for FIFO functionality

  • Author

    Van de Goor, Ad J. ; Zorian, Yervant

  • Author_Institution
    Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
  • fYear
    1993
  • fDate
    9-10 Aug 1993
  • Firstpage
    72
  • Lastpage
    76
  • Abstract
    First-in-first-out (FIFO) memories are becoming increasingly popular as buffer storage between subsystems operating at different data rates. One way to implement a FIFO is to use a single-port SRAM memory with arbitration logic to resolve conflicts due to simultaneous read and write requests. The well-know functional tests for SRAMs cannot be applied to FIFOs because of their built in access restrictions. Functional fault models and functional tests for FIFOs have been presented by van de Goor (1992). This paper presents functional fault models together with a set of tests and their correctness proofs for the logic implementing the FIFO functionality; e.g. embedded address registers, multiplexers, empty and full flags, etc
  • Keywords
    SRAM chips; buffer storage; fault location; integrated circuit testing; FIFO functionality; arbitration logic; buffer storage; embedded address registers; functional fault models; multiplexers; single-port SRAM memory; Buffer storage; Clocks; Counting circuits; Delay; Logic testing; Multiplexing; Pipelines; Random access memory; Read-write memory; Shift registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Testing, 1993., Records of the 1993 IEEE International Workshop on
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    0-8186-4150-9
  • Type

    conf

  • DOI
    10.1109/MT.1993.263146
  • Filename
    263146