DocumentCode
3490666
Title
On-Chip Analog Circuit Diagnosis in Systems-on-Chip Integration
Author
Noguchi, Koichiro ; Hashida, Takushi ; Nagata, Makoto
Author_Institution
Dept. of Comput. & Syst. Eng., Kobe Univ.
fYear
2006
fDate
19-21 Sept. 2006
Firstpage
118
Lastpage
121
Abstract
A highly multi-channel on-chip signal monitor establishes analog circuit diagnosis against environmental disturbances in SoCs. A 0.18-mum CMOS experimental on-chip test bench embeds an array of 53 distributed probes followed by a single shared waveform acquisition kernel, enabling on- and off-chip cooperative high-throughput digitization of 330 ms per sample point with adaptive 10-bit timing and voltage resolutions at the minimum LSB of 100 ps and 400 V. Analog signals of interest in a 1.5-bit conversion stage of pipeline ADC are evaluated in terms of their response to substrate noises globally existing in a chip. Through this on-chip diagnosis we derive in-depth findings relating to dynamic, large-signal, and sensitive behaviors of analog circuits in a real SoC environment, far beyond simulations with inevitably limited capacity
Keywords
analogue circuits; integrated circuit testing; system-on-chip; 0.18 micron; 1.5-bit conversion stage; 100 ps; 400 V; analog signals; on-chip analog circuit diagnosis; pipeline ADC; single shared waveform acquisition kernel; substrate noise; systems-on-chip integration; Adaptive arrays; Analog circuits; Circuit testing; Kernel; Monitoring; Probes; Signal resolution; System-on-a-chip; Timing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
Conference_Location
Montreux
ISSN
1930-8833
Print_ISBN
1-4244-0303-0
Type
conf
DOI
10.1109/ESSCIR.2006.307545
Filename
4099718
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