DocumentCode
3490998
Title
A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOS
Author
Seddighrad, P. ; Ravi, A. ; Sajadieh, M. ; Lakdawala, H. ; Soumyanath, K.
Author_Institution
Commun. Technol. Lab., Intel Corp., Hillsboro, OR
fYear
2008
fDate
15-19 Sept. 2008
Firstpage
202
Lastpage
205
Abstract
This paper presents a SigmaDelta DAC based transmitter (TX) baseband for 802.11n / 802.16e with channel filtering and gain control performed in the digital domain. The effect of circuit imperfections on TX EVM is analyzed for a robust line-up with gain control and the design of the high speed SigmaDelta modulator is described. The SigmaDelta DAC fabricated in a 90 nm CMOS process operates up to 3.6 GHz while drawing 16 mW from a 1.3 V supply.
Keywords
CMOS integrated circuits; digital control; digital-analogue conversion; power control; sigma-delta modulation; wide area networks; wireless LAN; CMOS process; SigmaDelta DAC based transmitter; TX EVM analysis; channel filtering; digital power control; frequency 3.6 GHz; gain control; power 16 mW; size 90 nm; voltage 1.3 V; 1f noise; Baseband; Circuits; Clocks; Filters; Gain control; Image sampling; Power control; Radio frequency; Radio transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European
Conference_Location
Edinburgh
ISSN
1930-8833
Print_ISBN
978-1-4244-2361-3
Electronic_ISBN
1930-8833
Type
conf
DOI
10.1109/ESSCIRC.2008.4681827
Filename
4681827
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