A 2.2mW, Continuous-Time Sigma-Delta ADC for Voice Coding with 95dB Dynamic Range in a 65nm CMOS Process

Author

Dörrer, Lukas ; Kuttner, Franz ; Santner, Andreas ; Kropf, Claus ; Hartig, Thomas ; Torta, Patrick ; Greco, Patrizia

Author_Institution

Infineon Technol. Austria AG, Villach

fYear

2006

fDate

19-21 Sept. 2006

Firstpage

195

Lastpage

198

Abstract

A second order continuous time multibit (4bit) DeltaSigma-ADC for voice coding is implemented in a 65nm CMOS process. The dynamic range (DR) is 95dB over the voice bandwidth of 20-20 000Hz. Furthermore, by using a feed back architecture the need of an anti aliasing filter is eliminated. The input operational amplifier is chopped to eliminate flicker noise and offset. These improvements give way to a substantial simplification of the analog front end by allowing the absorption of the pre-amplifier and the antialiasing filter into the DeltaSigma-ADC. Thanks to the feedback structure the slew rate at the quantizer is limited and a power-efficient tracking ADC can be used. The total harmonic distortion (THD) is below -77dB at maximum input signal of 1.4Vpp. The ADC consumes 2.2mW from a 1.2V supply when clocked at 12MHz. The active area is 0.149 mm²

Keywords

CMOS integrated circuits; analogue-digital conversion; audio coding; harmonic distortion; operational amplifiers; 1.2 V; 12 MHz; 2.2 mW; 20 Hz to 20 kHz; 4 bit; 65 nm; CMOS process; analog front end; anti aliasing filter; continuous-time ADC; harmonic distortion; operational amplifier; pre-amplifier; sigma-delta ADC; voice coding; 1f noise; Absorption; Bandwidth; CMOS process; Delta-sigma modulation; Dynamic range; Feedback; Feeds; Filters; Operational amplifiers;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European

Conference_Location

Montreux

ISSN

1930-8833

Print_ISBN

1-4244-0303-0

Type

conf

DOI

10.1109/ESSCIR.2006.307564

Filename

4099737