Low-Power Cell-level ADC for a MEMS-based Parallel Scanning-probe Storage Device

The paper presents a low-power, small-area solution for a cell-level ADC in a large array of MEMS-based sensors. First-and second-order switched-capacitor DeltaSigma modulators were identified as suitable candidates for minimum power and area consumption of signals having moderate bandwidth (50 kHz) and resolution (7 bits). Three different solutions to minimize the area and power (optimization of architecture, modulator, and bias current) were analyzed, fabricated, and experimentally verified. Through this systematic analysis, the power consumption could be minimized and was measured to be only 14 muW, a factor of 10 lower than in the initial design