Low-Power Cell-level ADC for a MEMS-based Parallel Scanning-probe Storage Device

Author

Bonan, Jose ; Hagleitner, Christoph ; Aboushady, Hassan

Author_Institution

Zurich Res. Lab., IBM, Ruschlikon

fYear

2006

fDate

19-21 Sept. 2006

Firstpage

239

Lastpage

242

Abstract

The paper presents a low-power, small-area solution for a cell-level ADC in a large array of MEMS-based sensors. First-and second-order switched-capacitor DeltaSigma modulators were identified as suitable candidates for minimum power and area consumption of signals having moderate bandwidth (50 kHz) and resolution (7 bits). Three different solutions to minimize the area and power (optimization of architecture, modulator, and bias current) were analyzed, fabricated, and experimentally verified. Through this systematic analysis, the power consumption could be minimized and was measured to be only 14 muW, a factor of 10 lower than in the initial design

Keywords

analogue-digital conversion; delta-sigma modulation; microsensors; sensor arrays; switched capacitor networks; 14 muW; 50 kHz; DeltaSigma modulators; MEMS parallel scanning-probe; MEMS sensor array; analog-digital converter; cell-level ADC; storage device; switched capacitor; Atomic force microscopy; Bandwidth; Capacitors; Crosstalk; Design optimization; Energy consumption; Laboratories; Probes; Sampling methods; Sensor arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European

Conference_Location

Montreux

ISSN

1930-8833

Print_ISBN

1-4244-0303-0

Type

conf

DOI

10.1109/ESSCIR.2006.307575

Filename

4099748