A 1.2V 56mW 10 bit 165Ms/s pipeline-ADC for HD-video applications

Author

Trojer, Martin ; Cleris, Mauro ; Gaier, Ulrich ; Hebein, Thomas ; Pridnig, Peter ; Kuttin, Bernhard ; Tschuden, Bernhard ; Krassnitzer, Christian ; Kuttin, Christian ; Pribyl, Wolfgang

Author_Institution

Micronas, Villach

fYear

2008

fDate

15-19 Sept. 2008

Firstpage

270

Lastpage

273

Abstract

A 10 bit 165 MS/s pipelined ADC without a dedicated sample and hold is presented. Op-amp sharing and a single ended reference buffer loaded with a resistive divider are used. The ADC consumes 56 mW and occupies 0.15 mm². It is fabricated in a 90 nm 1.2 V CMOS process and achieves 55 dB SNR for a 60 MHz input. A novel measurement technique called ldquopad noise suppressionrdquo is introduced to prevent digital crosstalk from data outputs.

Keywords

CMOS integrated circuits; analogue-digital conversion; high definition video; operational amplifiers; reference circuits; CMOS process; HD-video applications; Op-amp; digital crosstalk; pad noise suppression measurement technique; pipeline-ADC; power 56 mW; resistive divider; single ended reference buffer; size 90 nm; voltage 1.2 V; Capacitors; Circuit noise; Crosstalk; Energy consumption; Frequency; Graphics; Operational amplifiers; Sampling methods; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European

Conference_Location

Edinburgh

ISSN

1930-8833

Print_ISBN

978-1-4244-2361-3

Electronic_ISBN

1930-8833

Type

conf

DOI

10.1109/ESSCIRC.2008.4681844

Filename

4681844