DocumentCode
349127
Title
Multi bit DAC with corrective gate to drain voltage for optimum matching under gradient temperature effects
Author
Mojal, Michael
Author_Institution
Semicond. Syst. ICs, Siemens AG, Munich, Germany
Volume
1
fYear
1998
fDate
1998
Firstpage
139
Abstract
This paper describes a method to overcome matching errors due to the temperature gradient in silicon. A multi bit Digital to Analog Converter (DAC) is designed together with a high power line driver. The paper also describes the optimum value needed for w/l. The influences of fabrication errors on this optimum design are also discussed
Keywords
CMOS integrated circuits; digital-analogue conversion; errors; integrated circuit design; CMOS multi bit DAC; corrective gate to drain voltage; digital to analog converter; fabrication errors; gradient temperature effects; high power line driver; matching errors; multibit D/A convertor; optimum design; optimum matching; Digital-analog conversion; Equations; Heating; High power amplifiers; Packaging; Silicon; Temperature dependence; Temperature distribution; Thermal conductivity; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location
Lisboa
Print_ISBN
0-7803-5008-1
Type
conf
DOI
10.1109/ICECS.1998.813288
Filename
813288
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