DocumentCode
3491360
Title
The Design and Implementation of a Low-Overhead Supply-Gated SRAM
Author
Kuang, J.b. ; Ngo, H.c. ; Nowka, K.J. ; Ehrenreich, S. ; Drake, A.J. ; Pille, J. ; Kosonocky, S. ; Joshi, R. ; Nguyen, T. ; Vo, I.
Author_Institution
IBM Res., Austin, TX
fYear
2006
fDate
Sept. 2006
Firstpage
287
Lastpage
290
Abstract
The paper reports a virtual supply domain control technique for low-leakage SRAMs. This method encompasses cell-based sleep circuit tiling, sequentially regulated power-on/off, and flexible domain interfacing. The usual overhead associated with driving sleep transistors is significantly reduced by powering on/off gradually. Over 260times and 3times leakage reduction is observed in 65nm-technology hardware for hard and soft gating, respectively, including the leakage of control and drive circuits. Measured virtual domain power-on latency is compatible with high-frequency designs
Keywords
SRAM chips; driver circuits; 65 nm; cell-based sleep circuit tiling; drive circuits; flexible domain interfacing; high-frequency designs; low-leakage SRAM; sequentially regulated power; supply-gated SRAM; virtual domain power latency; virtual supply domain control; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
Conference_Location
Montreux
ISSN
1930-8833
Print_ISBN
1-4244-0303-0
Type
conf
DOI
10.1109/ESSCIR.2006.307587
Filename
4099760
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