DocumentCode :
3491642
Title :
A 46pJ/pulse analog front-end in 130nm CMOS for UWB impulse radio receivers
Author :
Van Helleputte, Nick ; Gielen, Georges
Author_Institution :
ESAT-MICAS, Katholieke Univ. Leuven, Heverlee
fYear :
2008
fDate :
15-19 Sept. 2008
Firstpage :
378
Lastpage :
381
Abstract :
This paper presents an integrated ultra-low power analog frontend architecture for UWB impulse radio receivers. The receiver is targeted towards applications like wireless sensor networks and body-area networks typically requiring ultra energy-efficient, low data-rate communication over a relative short range. The proposed receiver implements pulse correlation in the analog domain to severely relax the power consumption of the ADCpsilas and digital backend. Furthermore a fully integrated prototype of the analog front-end, containing an analog pulse correlator, a linear-in-dB variable gain amplifier and a 4-bit ADC, is demonstrated. Several design decisions and techniques, like correlation with a windowed LO instead of with a matched template, exploiting the duty-cycled nature of the system, operation in the sub-1 GHz band as well as careful circuit design are employed to reach ultra-low power consumption. The analog front-end was manufactured in 130 nm CMOS and the active circuit area measures only 600 mum times 730 mum. A maximum channel conversion gain of 50 dB can be achieved. The AFE consumes 1.44 mA at 1.2 V power supply and operates at a pulse rate of 37.5 Mpulses per second. This corresponds to an energy consumption of 46 pJ/pulse which is by far best-in-class. A wireless link over more than 3.5 m in an office-like environment has been demonstrated which makes the proposed receiver well suited for the targeted applications.
Keywords :
CMOS analogue integrated circuits; analogue-digital conversion; pulse amplifiers; radio receivers; ultra wideband communication; CMOS integrated circuit; UWB impulse radio receivers; analog front-end; analog pulse correlator; analog-digital conversion; current 1.44 mA; integrated ultra-low power architecture; pulse correlation; size 130 nm; ultra-low power consumption; variable gain amplifier; voltage 1.2 V; wireless link; word length 4 bit; Circuit synthesis; Correlators; Energy consumption; Energy efficiency; Gain; Prototypes; Pulse amplifiers; Pulsed power supplies; Receivers; Wireless sensor networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European
Conference_Location :
Edinburgh
ISSN :
1930-8833
Print_ISBN :
978-1-4244-2361-3
Electronic_ISBN :
1930-8833
Type :
conf
DOI :
10.1109/ESSCIRC.2008.4681871
Filename :
4681871
Link To Document :
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