Title :
Gepard: a parameterisable digital signal processor
Author :
Forsyth, Richard ; Gierlinger, Andreas ; Ofner, Erwin
Author_Institution :
Austria Mikro Syst. Int. AG, Austria
Abstract :
The architecture of a parameterisable DSP core designed for embedded ASIC use is described. The key features are a single cycle multiply accumulate and flexible instruction constructs. It can achieve competitive performance with other available DSPs with a very low cost hardware implementation
Keywords :
application specific integrated circuits; digital signal processing chips; embedded systems; DSP core; Gepard; embedded ASIC; flexible instruction constructs; low cost hardware implementation; parameterisable digital signal processor; single cycle multiply accumulate; Application specific integrated circuits; Costs; Digital signal processing; Digital signal processors; Hardware; Integrated circuit technology; Registers; Signal design; Signal processing; Signal processing algorithms;
Conference_Titel :
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location :
Lisboa
Print_ISBN :
0-7803-5008-1
DOI :
10.1109/ICECS.1998.813367
