DocumentCode
3492081
Title
Implementation of a phase-encoding signalling prototype chip
Author
D´Alessandro, Crescenzo ; Bystrov, Alex ; Yakovlev, Alex
Author_Institution
picoChip Designs Ltd., Bath
fYear
2008
fDate
15-19 Sept. 2008
Firstpage
478
Lastpage
481
Abstract
We report the results of the first prototype chip containing a silicon implementation of dual-rail phase-encoded links, where information is transmitted using the order of events on a pair of wires. The results show successful communication at bitrates exceeding 2 GB/s using standard-cell implementations on a 0.13 mum technology.
Keywords
integrated circuit interconnections; phase coding; dual-rail phase-encoded links; phase-encoding signalling prototype chip; size 0.13 mum; Bandwidth; Circuit testing; Clocks; Integrated circuit interconnections; Network-on-a-chip; Packaging; Pins; Prototypes; Signal design; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European
Conference_Location
Edinburgh
ISSN
1930-8833
Print_ISBN
978-1-4244-2361-3
Electronic_ISBN
1930-8833
Type
conf
DOI
10.1109/ESSCIRC.2008.4681896
Filename
4681896
Link To Document