Title :
A 45nm single power supply SRAM supporting low voltage operation down to 0.6V
Author :
Barasinski, Sebastien ; Camus, Ludovic ; Clerc, Sylvain
Author_Institution :
Central CAD & Design Solutions, STMicroelectronics, Crolles
Abstract :
A 256 Kb SRAM macrocell has been implemented in a 45 nm Low Power CMOS technology. A process and temperature tracking write-assist scheme, a write booster circuit and an adaptive read assist scheme allow low voltage operation down to 0.6 V with a single power supply.
Keywords :
CMOS memory circuits; SRAM chips; low-power electronics; SRAM macrocell; adaptive read assist scheme; low power CMOS technology; single power supply SRAM; size 45 nm; storage capacity 256 Kbit; voltage 0.6 V; write booster circuit; write-assist scheme; CMOS technology; Circuits; Emulation; Latches; Low voltage; MOSFETs; Macrocell networks; Power supplies; Random access memory; Timing;
Conference_Titel :
Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European
Conference_Location :
Edinburgh
Print_ISBN :
978-1-4244-2361-3
Electronic_ISBN :
1930-8833
DOI :
10.1109/ESSCIRC.2008.4681902
