A delay and loss versatile scheduling discipline in ATM switches

We propose a versatile scheduling discipline, called precedence with partial push-out (PPP), in asynchronous transfer mode (ATM) switches supporting two delay and two loss priorities. By employing a threshold L, PPP provides delay guarantee by allowing a newly-arriving high-delay-priority cell to precede a maximum of L low-delay-priority cells. Through the use of another threshold R, the discipline offers loss guarantee by permitting a newly-arriving high-loss-priority cell to push out the last low-loss-priority cell located beyond the Rth location in a full queue. By setting L and R properly, PPP versatilely performs as any one of the four widely-accepted disciplines, namely the FCFS, head-of-line, push-out, or head-of-line with push-out disciplines. To determine L and R retaining demanded quality of services (QoSs), we provide an in-depth queueing analysis for the cell delay (CD) and cell loss ratio (CLR) of high-delay-priority low-loss-priority cells. We further propose a simple, algebra-based analysis for the CD and CLR for low-delay-priority, high-loss-priority cells. On the basis of these analyses, L and R can be dynamically and effectively adjusted to provide adequate delay and loss guarantees for high-priority cells while incurring only minimal performance degradation for other classes of cells. Finally, the paper presents simulation results confirming the accuracy of the analyses