DocumentCode
3493948
Title
Impact of Random Dopant Fluctuation on Bulk CMOS 6-T SRAM Scaling
Author
Cheng, B. ; Roy, S. ; Roy, G. ; Brown, A. ; Asenov, A.
Author_Institution
Dept. of Electron. & Electr. Eng., Glasgow Univ.
fYear
2006
fDate
19-21 Sept. 2006
Firstpage
258
Lastpage
261
Abstract
Based on the statistical 3D device simulation of well scaled 25, 18 and 13nm physical gate length bulk MOSFETs, the impact of random dopant fluctuation on 6-T SRAM is studied in detail. The bias control approach is introduced to improve the scalability of bulk CMOS SRAM. Simulation results indicate that at 13nm physical gate length, bulk CMOS SRAM will face fundamental challenges arising from intrinsic parameter fluctuation, and a replacement by ultra thin body SOI CMOS may be necessary at this point
Keywords
CMOS memory circuits; MOSFET; SRAM chips; scaling circuits; silicon-on-insulator; 13 nm; 18 nm; 25 nm; CMOS 6-T SRAM scaling; MOSFET; intrinsic parameter fluctuation; random dopant fluctuation; statistical 3D device simulation; ultra thin body SOI; CMOS technology; Fluctuations; MOSFETs; Microprocessors; Random access memory; Resource description framework; Semiconductor device modeling; Semiconductor device noise; Stability; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European
Conference_Location
Montreux
ISSN
1930-8876
Print_ISBN
1-4244-0301-4
Type
conf
DOI
10.1109/ESSDER.2006.307687
Filename
4099905
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