Title :
2.4 Gbit/s CML I/Os with integrated line termination resistors realized in 0.5 μm BiCMOS technology
Author_Institution :
Alcatel Telecom, Stuttgart, Germany
Abstract :
High speed interconnections for mixed analog/digital ASICs using CML with integrated line termination resistors show good performance at 2.5 Gbit/s. Several impedance controlled line terminations are discussed, the realization is shown and measurement results are presented
Keywords :
BiCMOS integrated circuits; current-mode logic; data communication equipment; integrated circuit interconnections; mixed analogue-digital integrated circuits; receivers; resistors; transmitters; 0.5 micron; 2.4 Gbit/s; BiCMOS technology; CLM receiver; CLM transmitter; CML I/Os; high speed interconnections; impedance controlled line terminations; integrated line termination resistors; mixed analog/digital ASICs; BiCMOS integrated circuits; Circuit testing; Contact resistance; Impedance measurement; Linearity; MOS devices; MOSFETs; Manuals; Reflection; Resistors; Voltage control;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 1997. Proceedings of the
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-3916-9
DOI :
10.1109/BIPOL.1997.647415
