Busy period analysis for an ATM switching element output line

The authors consider an N×N asynchronous transfer mode (ATM) switching element with output queuing, under a uniformity assumption for the traffic arriving on the various input lines and for the output line address of the incoming cells. The traffic on each input line is modeled as a two-state Markov chain. The distribution of the busy and idle periods for each output line is analytically derived. It is concluded that it is not easy to identify a simple two-state Markov chain model that provides an adequate description for the output traffic. The implications of two different output line address assignment mechanisms for the incoming cells are quantitatively described. An alternative method is outlined for the computation of the steady-state distribution of the number of cells in the system. An analysis of the numerical results is presented