• DocumentCode
    3495463
  • Title

    Robust Ultra-Low Power Subthreshold Logic Flip-Flop Design for Reconfigurable Architectures

  • Author

    Chavan, Ameet ; Dukle, Gaurav ; Graniello, Ben ; MacDonald, Eric

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas Univ., El Paso, TX
  • fYear
    2006
  • fDate
    Sept. 2006
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    Low power consumption and radiation hardness are generally competing requirements for space electronics as well as many Earth-bound high reliability applications. Fault tolerance typically requires redundancy and reconfigurability to ensure correct functional operation in the presence of errors. However, this runs contrary to the requirement for reduced power consumption in many battery-powered applications. Recently, subthreshold logic has emerged as a technology that delivers the theoretical minimum energy per computation by running at ultra-low voltages. For many applications, the resulting performance degradation is tolerable due the dramatic increase in energy efficiency. Beyond the concerns with performance, an additional challenge is related to radiation hardness and noise immunity. The marriage of subthreshold logic and reconfigurable, high-reliability electronics is inevitable, yet there has been to date no investigation of the effects of radiation on circuits that operate at such low voltages. This paper provides a comprehensive comparison of a variety of flip-flop designs at subthreshold levels
  • Keywords
    flip-flops; low-power electronics; reconfigurable architectures; battery-powered application; fault tolerance; flip-flop design; high-reliability electronics; low power consumption; power consumption; radiation hardness; reconfigurable architecture; robust ultra-low power subthreshold logic; Energy consumption; Error correction; Fault tolerance; Flip-flops; Logic design; Reconfigurable architectures; Reconfigurable logic; Redundancy; Robustness; Space technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reconfigurable Computing and FPGA's, 2006. ReConFig 2006. IEEE International Conference on
  • Conference_Location
    San Luis Potosi
  • Print_ISBN
    1-4244-0690-0
  • Electronic_ISBN
    1-4244-0690-0
  • Type

    conf

  • DOI
    10.1109/RECONF.2006.307764
  • Filename
    4099984