Modelling and Quantitative Analysis of Coupling Mechanisms of Programmable Processor Cores and Arithmetic Oriented eFPGA Macros

Advances in semiconductor technology and ever growing complexity of modern digital systems facilitate the design of novel architectures integrating former self-contained architecture blocks on one die. In this contribution a SoC basically combined of a RISC processor core and an arithmetic oriented eFPGA is modelled, quantitatively analysed and in particular coupling aspects of the eFPGA and the RISC processor core are discussed. These coupling mechanisms are quantitatively evaluated in terms of energy efficiency, area and performance. Furthermore, decisive design parameters for the coupling like the degree of coupling etc. are discussed and compared with other realisations for exemplary operators (DES, median filter)