DocumentCode
3495869
Title
Performance evaluation of packet processing architectures using multiclass queuing networks
Author
Sonntag, Soren ; Gries, Matthias ; Sauer, Christian
Author_Institution
Wireline Access Commun., Infineon Technol., Munich, Germany
fYear
2006
fDate
2-6 April 2006
Abstract
Modern real-time systems consist of complex parallel and heterogeneous architectures. Early design decisions, such as the partitioning of functionality onto architecture building blocks and the choice of algorithms, have a large impact on the quality of the resulting platform. In order to support the designer during this concept phase, we have developed our performance evaluation framework SystemQ. In this paper, we demonstrate why multiclass queuing networks as used by SystemQ are a natural abstraction for evaluating network processing platforms. In particular, we reveal the impact of scheduling policies on the quality-of-service, such as the residence time of network traffic in the system. For the same stimuli, the packet latency can vary by more than one order of magnitude if only one queuing discipline in the system is modified.
Keywords
packet switching; parallel architectures; performance evaluation; quality of service; queueing theory; real-time systems; telecommunication traffic; SystemQ; multiclass queuing network; network processing platform evaluation; network traffic; packet latency; packet processing architecture; performance evaluation; quality-of-service; real-time system; scheduling policy; Algorithm design and analysis; Communications technology; Computer architecture; Costs; Hardware; Phase estimation; Queueing analysis; Real time systems; Telecommunication traffic; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation Symposium, 2006. 39th Annual
ISSN
1080-241X
Print_ISBN
0-7695-2559-8
Type
conf
DOI
10.1109/ANSS.2006.35
Filename
1612847
Link To Document