The design and verification of a high-performance low-control-overhead asynchronous differential equation solver

Author

Yun, Kenneth Y. ; Beerel, Peter A. ; Vakilotojar, Vida ; Dooply, Ayoob E. ; Arceo, Julio

Author_Institution

Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA

fYear

1997

fDate

7-10 Apr 1997

Firstpage

140

Lastpage

153

Abstract

This paper describes the design and verification of a high-performance asynchronous differential equation solver. The design has low control overhead which allows the average-case delay to be 48% faster (tested at 22°C and 3.3 V) than any comparable synchronous design (simulated at 100°C and 3 V). The techniques to reduce completion sensing overhead and hide control overhead at the circuit, architectural, and protocol levels are discussed. In addition, symbolic model checking techniques are described that were used to gain higher confidence in the correctness of the timed distributed control

Keywords

asynchronous circuits; formal verification; asynchronous differential equation solver; completion sensing overhead; control overhead; design and verification; high-performance; low-control-overhead; symbolic model checking; timed distributed control; Asynchronous circuits; Circuit simulation; Clocks; Communication system control; Delay; Differential equations; Frequency; Protocols; Temperature; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Research in Asynchronous Circuits and Systems, 1997. Proceedings., Third International Symposium on

Conference_Location

Eindhoven

Print_ISBN

0-8186-7922-0

Type

conf

DOI

10.1109/ASYNC.1997.587170

Filename

587170