FIR filter design and implementation on reconfigurable computing technology

Author

Dawood, Anwar ; Asdani, Zulfi ; Bravo, Boris

Author_Institution

Sch. for Electr. & Electron. Syst. Eng., Queensland Univ. of Technol., Brisbane, Qld., Australia

Volume

1

fYear

1999

fDate

1999

Firstpage

383

Abstract

This paper elaborates on the design and implementation of a finite impulse response (FIR) filter on reconfigurable computing technology (RCT). RCT uses field programmable gate array (FPGA) technology as a flexible platform for implementing and improving the design. The FPGA used for this design is the Xilinx XC4062 chip. The paper outlines the advantages of using RCT in improving the performance of the designed digital filter. It describes the methodology followed throughout the design, analysis, verification, simulation, and test of the digital circuit. The design methodology does scale to more complex functions and architectures

Keywords

FIR filters; circuit CAD; circuit simulation; digital filters; field programmable gate arrays; integrated circuit design; integrated circuit testing; reconfigurable architectures; FIR filter design; FIR filter implementation; FPGA technology; Matlab software; Xilinx Foundation Software; Xilinx XC4062 chip; digital circuit; field programmable gate array; filter simulation; filter verification; finite impulse response; reconfigurable computing technology; testing; Australia; Circuit testing; Computer applications; Digital filters; Digital signal processing; Field programmable gate arrays; Finite impulse response filter; Hardware; Transducers; Variable speed drives;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing and Its Applications, 1999. ISSPA '99. Proceedings of the Fifth International Symposium on

Conference_Location

Brisbane, Qld.

Print_ISBN

1-86435-451-8

Type

conf

DOI

10.1109/ISSPA.1999.818192

Filename

818192