DocumentCode :
3497204
Title :
A new PFC converter with reduced output bus capacitors
Author :
Yisheng, Yuan
Author_Institution :
East China Jiaotong Univ., Nanchang, China
fYear :
2010
fDate :
16-18 June 2010
Firstpage :
229
Lastpage :
231
Abstract :
A new PFC converter with reduced bus capacitor has been proposed. It detaches the traditional output bus capacitor into two parts, and adds an auxiliary power switch in traditional PFC converter. The converter operated in normal PFC mode when the line is normal and switch to another boost mode as the ac line is faulty. The added boost mode can convert the energy of the big bus capacitor to the little bus capacitor and back-end converter, which increase the hold-up time. The relationship between the hold-up time and acquired capacitor is derived. Experimental prototype converter, compared with the conventional PFC circuit, proves the hold-up time is extended to 2.5 times.
Keywords :
Capacitors; Converters; Power MOSFET; Power supplies; Prototypes; Switches; Boost converter; Bus capacitor; Hold-up time; Power factor correction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics for Distributed Generation Systems (PEDG), 2010 2nd IEEE International Symposium on
Conference_Location :
Hefei, China
Print_ISBN :
978-1-4244-5669-7
Type :
conf
DOI :
10.1109/PEDG.2010.5545904
Filename :
5545904
Link To Document :
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