High-speed ECL-compatible serial I/O in 0.35 μm CMOS

Author

Djahanshahi, H. ; Hansen, E. ; Salama, C.A.T.

Author_Institution

Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada

Volume

2

fYear

1998

fDate

1998

Firstpage

59

Abstract

This paper presents high-speed input and output interface circuits for serial data communication at 622 Mb/s (OC-12) standard. The circuits are designed in a 0.35 μm triple-metal CMOS process. Signal levels are compatible with industry standards for low-voltage positive ECL. Combining circuit design techniques with the features of a submicron technology, the presented I/O blocks enable a full-CMOS chip to communicate directly with high-speed ECL-compatible devices at rates up to 1 Gb/s

Keywords

CMOS digital integrated circuits; data communication equipment; emitter-coupled logic; high-speed integrated circuits; timing circuits; 0.35 micron; 1 Gbit/s; 622 Mbit/s; ECL-CMOS-ECL repeater; ECL-compatible serial I/O; OC-12 standard; circuit design techniques; full-CMOS chip; high-speed serial I/O; input/output interface circuits; low-voltage positive ECL; retiming chip; serial data communication; submicron technology; triple-metal CMOS process; CMOS process; Communication standards; Data communication; Detectors; Educational institutions; Integrated circuit interconnections; Mirrors; Pulse circuits; Transmitters; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 1998 IEEE International Conference on

Conference_Location

Lisboa

Print_ISBN

0-7803-5008-1

Type

conf

DOI

10.1109/ICECS.1998.814824

Filename

814824