Title :
Carbon nanotube imperfection-immune digital VLSI
Author :
Mitra, Subhasish
Author_Institution :
Department of Electrical Engineering, Department of Computer Science, Stanford University
Abstract :
Carbon Nanotube Field Effect Transistors (CNFETs) are excellent candidates for building highly energy-efficient future electronic systems. Unfortunately, carbon nanotubes (CNTs) are highly subject to inherent imperfections that pose major obstacles to robust CNFET digital VLSI: • It is nearly impossible to guarantee perfect alignment and positioning of all CNTs. This limitation introduces stray conducting paths, resulting in incorrect circuit functionality. • CNTs can be metallic or semiconducting depending on chirality. Metallic CNTs cause shorts resulting in excessive leakage and incorrect circuit functionality. A combination of design and processing techniques, presented in this talk, overcomes these challenges by creating CNFET digital VLSI circuits that are immune to these substantial inherent imperfections. This imperfection-immune design paradigm enables the first experimental demonstrations of: • Digital sub-systems built using CNFETs • Monolithic three-dimensional CNFET ICs. This research was performed at Stanford University in collaboration with Prof. H. S. Philip Wong and several Ph.D. students.
Conference_Titel :
Low Power Electronics and Design (ISLPED), 2013 IEEE International Symposium on
Conference_Location :
Beijing
Print_ISBN :
978-1-4799-1234-6
DOI :
10.1109/ISLPED.2013.6629284