Title :
Wide-area clock distribution using controlled delay lines
Author :
Aguiar, Rui L. ; Santos, Dinis M.
Author_Institution :
Dept. de Electron. e Telecoms, Aveiro Univ., Portugal
Abstract :
This paper describes a clock distribution strategy adequate for wide-area synchronisation, applicable to VLSI, WSI and MCM systems. This strategy is described in terms of Controlled Delay Lines. Local clock multiplication is proposed to solve possible phase ambiguities. Implementation issues are also discussed. Simulations using DLLs with extreme parameter variations are presented in the last section. Sub-nanosecond phase accuracy is shown for wafer size areas
Keywords :
VLSI; delay lines; delay lock loops; digital integrated circuits; multichip modules; synchronisation; timing; wafer-scale integration; DLL; MCM systems; VLSI systems; WSI systems; clock distribution strategy; controlled delay lines; local clock multiplication; parameter variations; subnanosecond phase accuracy; wide-area clock distribution; wide-area synchronisation; Clocks; Delay lines; Distributed parameter circuits; Distribution strategy; Frequency synchronization; Integrated circuit interconnections; Packaging; Telecommunication control; Very large scale integration; Voltage control;
Conference_Titel :
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location :
Lisboa
Print_ISBN :
0-7803-5008-1
DOI :
10.1109/ICECS.1998.814825
