• DocumentCode
    3497450
  • Title

    A practical low-power memristor-based analog neural branch predictor

  • Author

    Jianxing Wang ; Tim, Yenni ; Weng-Fai Wong ; Li, Hai Helen

  • Author_Institution
    Sch. of Comput., Nat. Univ. of Singapore, Singapore, Singapore
  • fYear
    2013
  • fDate
    4-6 Sept. 2013
  • Firstpage
    175
  • Lastpage
    180
  • Abstract
    Recently, the discovery of memristor brought the promise of high density, low energy, and combined memory/arithmetic capability into computing. This paper demonstrates a practical neural branch predictor based on memristor. By using analog computation techniques, as well as exploiting the accuracy tolerance of branch prediction, our design is able to efficiently realize a neural prediction algorithm. Compared to the digital counterpart, our method achieves significant energy reduction while maintaining a better prediction accuracy and a higher IPC. Our approach also reduces the resource and energy required by an alternative design.
  • Keywords
    low-power electronics; memristors; neural chips; analog computation technique; branch prediction accuracy tolerance; combined memory-arithmetic capability; energy reduction; low-power memristor-based analog neural branch predictor; memristor discovery; Accuracy; Computational modeling; History; Memristors; Random access memory; Resistance; Training; Branch Prediction; Memristor; Neural Branch Predictor;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics and Design (ISLPED), 2013 IEEE International Symposium on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4799-1234-6
  • Type

    conf

  • DOI
    10.1109/ISLPED.2013.6629290
  • Filename
    6629290