DocumentCode :
349748
Title :
Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters
Author :
Marques, A. ; Peluso, V. ; Steyaert, M. ; Sansen, W.
Author_Institution :
ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
Volume :
2
fYear :
1998
fDate :
1998
Firstpage :
153
Abstract :
The trade-off relationship between bandwidth, resolution, and power in ΔΣ ADCs realized in CMOS technologies is studied. The design of ΔΣ converters is discussed in order to achieve an optimum trade-off between bandwidth, resolution, and power, or alternatively the maximum bandwidth, resolution product. A best case estimation of this trade-off is derived and compared with the known limits imposed by noise and matching. It is shown that the fundamental limit imposed by noise, when circuit considerations are taken into account, becomes comparable to the matching limit in current technologies. Therefore, even if the matching characteristics of technologies improve, the bandwidth, resolution, and power trade-off of conventional ΔΣ converters will not improve significantly
Keywords :
analogue-digital conversion; circuit noise; delta-sigma modulation; impedance matching; thermal noise; ΔΣ ADC; A/D convertors; CMOS technologies; analog to digital converters; bandwidth tradeoff; delta-sigma ADCs; matching characteristics; noise; power tradeoff; resolution tradeoff; Bandwidth; CMOS technology; Capacitors; Circuit noise; Energy consumption; Noise shaping; Quantization; Sampling methods; Signal processing; Signal resolution;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location :
Lisboa
Print_ISBN :
0-7803-5008-1
Type :
conf
DOI :
10.1109/ICECS.1998.814853
Filename :
814853
Link To Document :
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