Interactive verification of switched-current sigma-delta modulators

A simulation tool named SDSI, specifically suited for the simulation of switched-current (SI) sigma-delta data converters, has been developed in an interactive design environment. The tool exploits the sampled-data nature of the circuits and provides several levels of hierarchy for the models. High level behavioural models are suited for initial system-level simulations and specification of building blocks. Lower level models, which take into account non-linear effects and eventually full SPICE level transistor models, are suited for bottom-up verification of circuits after the design of the building-blocks. There are no restrictions on the interoperability of both types of models. Very fast simulation times are achieved thanks to the sampled-data simulation approach, making the tool appropriate for the extensive analysis of sigma-delta modulators. The tool has been used to check the performance of a SI bandpass sigma-delta modulator fabricated in a 0.8 μm CMOS technology. Experimental results validate this approach to the verification of SI sigma-delta modulators