DocumentCode
349750
Title
Practical considerations for the design of cascade multi-bit high-frequency ΣΔ modulators
Author
Medeiro, F. ; Del Río, R. ; Perez-Verdu, Belen ; Rodríguez-Vázquez, A.
Author_Institution
Inst. de Microelectron., CSIC, Sevilla, Spain
Volume
2
fYear
1998
fDate
1998
Firstpage
161
Abstract
Recommendations are given for efficient design of high-frequency ΣΔ modulators using multi-stage (cascade) multi-bit quantization architectures. These cover from pure architectural aspects to cell design with special emphasis on the impact of circuit imperfections. Conclusions are validated by measurements on a 13-bit 2.2 MS/s prototype fabricated in a 0.7 μm CMOS technology
Keywords
CMOS integrated circuits; cascade networks; integrated circuit design; modulators; sigma-delta modulation; 0.7 micron; 13 bit; CMOS technology; HF sigma-delta modulators; architectural aspects; cascade multi-bit HF ΣΔ modulators; cell design; circuit imperfections; high-frequency ΣΔ modulators; multi-bit quantization architectures; CADCAM; CMOS technology; Circuits; Computer aided manufacturing; Delta modulation; Frequency conversion; Frequency modulation; Quantization; Sampling methods; Signal resolution;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location
Lisboa
Print_ISBN
0-7803-5008-1
Type
conf
DOI
10.1109/ICECS.1998.814855
Filename
814855
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