DocumentCode :
3498436
Title :
Limitations of rapid thermal processing on ultra-shallow junctions for sub-0.25 mu m MOSFETs
Author :
Liu, R. ; Pai, C.S. ; Lu, C.Y. ; Sung, J.M. ; Tsai, N.S.
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
fYear :
1993
fDate :
1993
Firstpage :
20
Lastpage :
23
Abstract :
Very shallow ( approximately 0.1 mu m) junctions are needed for sub-0.25 mu m MOSFET devices. These junctions can be made by implanting dopants into silicides and then drive out by RTA. Compared to furnace processed junctions, however, the RTA processed junctions show a higher leakage current, coupled with a non-ideal diode behavior. In addition, good junctions processed by furnace annealing showing ideal behavior and low leakage current are converted to leakier non-ideal diodes after an additional RTA. On the other hand, leaky junctions processed by RTA can be ´cured´ by an additional furnace annealing. The authors conclude that Rapid Thermal Processing has to be carefully engineered to produce useful shallow junctions for 0.25 mu m and sub-0.25 mu m devices.
Keywords :
CMOS integrated circuits; VLSI; insulated gate field effect transistors; ion implantation; leakage currents; rapid thermal processing; 0.25 micron; CMOS; MOSFET devices; RTA processed; VLSI; dopant drive-out; leakage current; leaky junctions; non-ideal diode behavior; rapid thermal processing; submicron devices; ultra-shallow junctions; Diodes; Furnaces; Implants; Leakage current; MOSFETs; Rapid thermal annealing; Rapid thermal processing; Silicides; Temperature dependence; Thermal engineering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 1993. Proceedings of Technical Papers. 1993 International Symposium on
Conference_Location :
Taipei, Taiwan
ISSN :
1524-766X
Print_ISBN :
0-7803-0978-2
Type :
conf
DOI :
10.1109/VTSA.1993.263619
Filename :
263619
Link To Document :
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