Title :
Transistor design with TCAD tuning and device optimization for process/device synthesis
Author :
Rodder, M. ; Chatterjee, A. ; Boning, D. ; Chen, I.C.
Author_Institution :
Semiconductor Process & Design Center, Texas Instruments, Dallas, TX, USA
Abstract :
Process/device synthesis using automated optimized device design with a set of target/constraint values is investigated to reduce device design time and product cycle time. As a first step, the authors report results on (a) transistor design methodology, (b) TCAD simulator tuning methodology, and (c) device optimization using process sensitivity considerations and a new transistor figure-of-merit for digital circuit speed.
Keywords :
CMOS integrated circuits; application specific integrated circuits; circuit CAD; insulated gate field effect transistors; logic CAD; semiconductor device models; semiconductor process modelling; ASIC logic; MOSFET; PISCES comparison; SPICE; TCAD tuning; VLSI; automated optimized device design; device design time; device optimization; digital CMOS; digital circuit speed; process sensitivity; process/device synthesis; product cycle time; target/constraint values; transistor design methodology; transistor figure-of-merit; tune CAD tools; Application specific integrated circuits; Constraint optimization; Design methodology; Design optimization; Instruments; Oxidation; Process design; Product design; Space exploration; Space technology;
Conference_Titel :
VLSI Technology, Systems, and Applications, 1993. Proceedings of Technical Papers. 1993 International Symposium on
Conference_Location :
Taipei, Taiwan
Print_ISBN :
0-7803-0978-2
DOI :
10.1109/VTSA.1993.263621
