• DocumentCode
    3498889
  • Title

    N2O nitrided gate dielectric technology for 0.25 mu m CMOS

  • Author

    Woerlee, P.H. ; Lifka, H. ; Montree, A.H. ; Paulzen, G.M. ; Pomp, H. ; Woltjer, R.

  • Author_Institution
    Philips Res. Labs., Eindhoven, Netherlands
  • fYear
    1993
  • fDate
    1993
  • Firstpage
    105
  • Lastpage
    108
  • Abstract
    A technology for thin N2O nitrided gate oxide was developed for 0.25 mu m CMOS. A gate dielectric of 7.5 nm thickness was grown using a two-step furnace process. The first step is oxidation in diluted dry oxygen at 900 degrees C, the second step is nitridation in pure N2O at 950 degrees C. The use of lightly nitrided gate dielectrics improved the gate oxide quality and did not degrade the MOS device properties. Furthermore, boron diffusion through the thin dielectric of BF2 doped poly gates was suppressed by N2O nitridation.
  • Keywords
    CMOS integrated circuits; VLSI; insulated gate field effect transistors; nitridation; 0.25 micron; 900 C; 950 C; CMOS; MOS capacitors; MOS device properties; NMOST; PMOST; SiOxNy; VLSI; gate oxide quality; lightly nitrided gate dielectrics; nitridation; nitrided gate dielectric technology; oxidation; pure N2O; scaled LOCUS isolation; two-step furnace process; Annealing; CMOS technology; Degradation; Dielectrics; Furnaces; Interface states; MOS capacitors; Nitrogen; Oxidation; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems, and Applications, 1993. Proceedings of Technical Papers. 1993 International Symposium on
  • Conference_Location
    Taipei, Taiwan
  • ISSN
    1524-766X
  • Print_ISBN
    0-7803-0978-2
  • Type

    conf

  • DOI
    10.1109/VTSA.1993.263637
  • Filename
    263637