A new cell and process for very high density full feature EEPROMs and low power applications

A novel high density full feature EEPROM cell with minimum process complexity is proposed. The new structure is a contactless cell with buried N+ bit lines. The floating gate is self aligned to the word line, using self aligned stacked etch technology. Strong reduction of contacts number and cell area is achieved with respect to the conventional Flotox cells. Electrical characteristics and reliability behaviour of this novel structure have been studied and are reported together with the fabrication process. Performances and scalability make this cell interesting for future low power multi-megabit EEPROM applications.