Title :
A CMOS interface IC for CCD imagers
Author :
Kim, K.Y. ; Abidi, A.A.
Author_Institution :
Integrated Circuits & Syst. Lab. California Univ., Los Angeles, CA, USA
Abstract :
A 2- mu m CMOS IC interfaces directly to the output of a CCD, level shifts the signal, amplifies it by a 4-bit programmable gain of up to 20 dB, and corrects the offset per pixel with a 3-bit word. A non-reset video output is obtained with an internal time-interleaved architecture. The total harmonic distortion (THD) of -50 dB is obtained at 15 MHz clock rates and +or-3.3 V full scale outputs. The 2.8*3.7 sq mm circuit dissipates 140 mW from a 5V supply.
Keywords :
CCD image sensors; CMOS integrated circuits; analogue processing circuits; image processing equipment; switched capacitor networks; 140 mW; 15 MHz; 2 micron; 20 dB; 5 V; CCD imagers; CMOS interface IC; analogue signal conditioning; clock rates; discrete time SC circuits; internal time-interleaved architecture; nonreset video output; programmable gain; total harmonic distortion; CMOS integrated circuits; Cameras; Capacitors; Charge coupled devices; Clocks; Coupling circuits; Digital images; Pixel; Sampling methods; Voltage;
Conference_Titel :
VLSI Technology, Systems, and Applications, 1993. Proceedings of Technical Papers. 1993 International Symposium on
Conference_Location :
Taipei, Taiwan
Print_ISBN :
0-7803-0978-2
DOI :
10.1109/VTSA.1993.263661
