DocumentCode
3499454
Title
Substrate Current Injection and Latchup in Complementary Vertical Bipolar Processes
Author
Strachan, Andy
Author_Institution
Adv. Process Technol. Dev., National Semicond. Corp., Santa Clara, CA
fYear
2006
fDate
8-10 Oct. 2006
Firstpage
1
Lastpage
6
Abstract
Challenges and solutions for substrate current injection and latchup phenomena in complementary BiCMOS technologies are described. The vertical PNP presents specific challenges that differ from CMOS or NPN-only BiCMOS cases
Keywords
BiCMOS integrated circuits; flip-flops; complementary BiCMOS technologies; complementary vertical bipolar processes; latchup phenomena; substrate current injection; vertical PNP; Analog circuits; Batteries; BiCMOS integrated circuits; CMOS technology; Crosstalk; Cutoff frequency; Isolation technology; Low voltage; Substrates; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting, 2006
Conference_Location
Maastricht
ISSN
1088-9299
Print_ISBN
1-4244-0458-4
Electronic_ISBN
1088-9299
Type
conf
DOI
10.1109/BIPOL.2006.311112
Filename
4100247
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