• DocumentCode
    3499560
  • Title

    A continuously-adapting analog node using floating-gate synapses

  • Author

    Dugger, Jeff ; Hasler, Paul

  • Author_Institution
    Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    3
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    1058
  • Abstract
    Demonstrates that a network of pFET single-transistor learning synapses implements a multi-input adaptive node. These floating-gate synapses are capable of four-quadrant multiplications between an input and a weight, as well as adapting to a four-quadrant correlation between the input and a learning signal applied as a drain voltage. Our adaptive floating-gate node structure converges to the correct solution for constant RMS input values during adaptation. Our structure accounts for device mismatch, gate variance, and drain variance effects in the learning rule. We present experimental results for our circuit
  • Keywords
    analogue multipliers; field effect analogue integrated circuits; neural chips; constant RMS input values; continuously-adapting analog node; device mismatch; drain variance; drain voltage; floating-gate synapses; four-quadrant correlation; four-quadrant multiplications; gate variance; learning signal; multi-input adaptive node; pFET single-transistor learning synapses; Adaptive arrays; Adaptive filters; Analog computers; Analog memory; Circuits; EPROM; Nonvolatile memory; Time domain analysis; Tunneling; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
  • Conference_Location
    Lansing, MI
  • Print_ISBN
    0-7803-6475-9
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2000.951398
  • Filename
    951398