• DocumentCode
    3499599
  • Title

    ARB-NET: A novel adaptive monitoring platform for stacked mesh 3D NoC architectures

  • Author

    Rahmani, Amir-Mohammad ; Latif, Khalid ; Vaddina, Kameswar Rao ; Liljeberg, Pasi ; Plosila, Juha ; Tenhunen, Hannu

  • Author_Institution
    Dept. of Inf. Technol., Univ. of Turku, Turku, Finland
  • fYear
    2012
  • fDate
    Jan. 30 2012-Feb. 2 2012
  • Firstpage
    413
  • Lastpage
    418
  • Abstract
    The emerging three-dimensional integrated circuits (3D ICs) offer a promising solution to mitigate the barriers of interconnect scaling in modern systems. In order to exploit the intrinsic capability of reducing the wire length in 3D ICs, 3D NoC-Bus Hybrid mesh architecture was proposed. Besides its various advantages in terms of area, power consumption, and performance, this architecture has a unique and hitherto previously unexplored way to implement an efficient system-wide monitoring network. In this paper, an integrated low-cost monitoring platform for 3D stacked mesh architectures is proposed which can be efficiently used for various system management purposes. The proposed generic monitoring platform called ARB-NET utilizes bus arbiters to exchange the monitoring information directly with each other without using the data network. As a test case, based on the proposed monitoring platform, a fully congestion-aware adaptive routing algorithm named AdaptiveXYZ is presented taking advantage from viable information generated within bus arbiters. Our extensive simulations with synthetic and real benchmarks reveal that our architecture using the AdaptiveXYZ routing can help achieving significant power and performance improvements compared to recently proposed stacked mesh 3D NoCs.
  • Keywords
    asynchronous circuits; electronic engineering computing; integrated circuit interconnections; mesh generation; network routing; network-on-chip; 3D NoC-bus hybrid mesh architecture; 3D integrated circuits; ARB-NET; AdaptiveXYZ routing; adaptive monitoring platform; bus arbiters; congestion-aware adaptive routing algorithm; integrated low-cost monitoring platform; interconnect scaling barrier mitigation; network-on-chip; performance improvement; power improvement; stacked mesh 3D NoC architectures; system management; system-wide monitoring network; wire length reduction; Computer architecture; Measurement units; Monitoring; Routing; Stress; System-on-a-chip; Three dimensional displays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific
  • Conference_Location
    Sydney, NSW
  • ISSN
    2153-6961
  • Print_ISBN
    978-1-4673-0770-3
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2012.6164984
  • Filename
    6164984