TTBist: a DfT Tool for Enhancing Functional Test for SoC

The paper presents a new tool called TTBist for DfT synthesis of IP cores in systems-on-a-chip. While scan-based approaches have been known for a long time, they have shortcomings and they are rarely used in practice in smaller design companies. The current paper introduces a new alternative for this traditional method. The tool TTBist allows to automatically insert built-in self-test (BIST) structures into sequential cores of the system. Alternatively, in cases when BIST proves inefficient, it synthesizes observers for functional test to the outputs of the cores. This considerably speeds up fault grading of the functional test for the system. TTBist is well integrated to common commercial design flows