Impacts of gap thickness scaling on Thin-Film Transistors with suspended nanowire channels

For the past years, MEMS-based devices such as Suspended Gate Metal-Oxide-Semiconductor Field-Effect Transistor (SG-MOSFET) and air-gap poly Si Thin-Film Transistors (TFTs) have received considerable attention because of their abrupt switching characteristics which is attractive for solving the non-scalable subthreshold swing (SS) of traditional MOSFETs. Although some simulation results showed that the pull-in voltage, which can be regarded as the threshold voltage of MOSFET, could be reduced directly by shrinking the air-gap thickness, however, difficulty in etching arises because of extremely high aspect ratio of the air gap structure as the gap thickness is scaled down. We had previously proposed a novel suspended nanowire (NW) channel device with sub-100 nm air gap for reducing the operation voltage. Owing to the use of the tiny NW channels, the air gap structure with a small aspect ratio could be formed by a common buffered oxide etchant (BOE) which greatly simplifies the processes. In this work, we discuss the impacts of gap thickness scaling on the operation of the suspended NW channel devices.