Title :
Functional Test Generation for Finite State Machines
Author :
Ubar, R. ; Brik, M. ; Jutman, A. ; Raik, J. ; Bengtsson, T. ; Kumar, S.
Author_Institution :
Dept. of Comput. Eng., TTU, Tallinn
Abstract :
In this paper, a pure functional test generation method for finite state machines (FSM) is proposed. The method is solely based on state transition diagram (STD) description of FSMs. It guarantees full coverage of stuck-at faults in a two-level implementation of the sum-of-product forms of the next state logic and output logic synthesized from the STD. For simplification the test generation process and reducing the test length, the state flip-flops are made observable. Experiments show the efficiency of the method
Keywords :
design for testability; finite state machines; logic testing; finite state machines; functional test generation; next state logic; output logic; state flip-flops; state transition diagram; stuck-at faults; sum-of-product forms; Automata; Circuit faults; Circuit synthesis; Circuit testing; Design for testability; Electronic mail; Flip-flops; Logic testing; Sequential analysis; Sequential circuits;
Conference_Titel :
Baltic Electronics Conference, 2006 International
Conference_Location :
Tallinn
Print_ISBN :
1-4244-0414-2
Electronic_ISBN :
1736-3705
DOI :
10.1109/BEC.2006.311099
