DocumentCode
3500844
Title
An application of Verilog-A to modeling of back propagation algorithm in neural networks
Author
Suzuki, Kenichi ; Nishio, Akinobu ; Kamo, Atsushi ; Watanabe, Takayuki ; Asai, Hideki
Author_Institution
Fac. of Eng., Shizuoka Univ., Hamamatsu, Japan
Volume
3
fYear
2000
fDate
2000
Firstpage
1336
Abstract
This paper describes an application of the Verilog-A, which is a hardware description language for analog applications, to the modeling of neural networks. We attempt to simulate neural networks having a learning algorithm, which has not been designed with electronic circuits. The learning algorithm is modeled with Verilog-A and the suitable synaptic weights are solved by Verilog-A simulation
Keywords
backpropagation; hardware description languages; modelling; neural nets; Verilog-A; Verilog-A simulation; analog hardware description language; backpropagation algorithm; learning algorithm; neural network modelling; synaptic weights; Circuit simulation; Circuit synthesis; Digital systems; Electronic circuits; Hardware design languages; Intelligent networks; Modeling; Neural networks; Neurons; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.951461
Filename
951461
Link To Document