DocumentCode :
3501052
Title :
The study of testing scenario for a SIP microcomputer
Author :
Liangliang Liu ; Penglong Jiang ; Xiongbo Zhao
Author_Institution :
Beijing Aerosp. Autom. Control Inst., Beijing, China
fYear :
2012
fDate :
13-16 Aug. 2012
Firstpage :
15
Lastpage :
18
Abstract :
The ceaseless drive to produce cheaper and better products has compelled the Semiconductor Industry to continue to innovate. Because of its priority that chips or dies of different techniques can be integrated in a package, SIP (System In Package) is applied more and more widely in the embedded control system. At the same time, the test of SIP has also been a big challenge owing to the amount constraint of the pads while so many functions are integrated in. A new testing scenario by DSU, JTAG and LEON2 processor for a SIP micro-computer is presented and a testing system including Chip test, PCB test and Post-packaging is designed for the SIP micro-computer test. The testing scenario and test system make the product engineers´ task easier by improving the testability of SIP.
Keywords :
microprocessor chips; printed circuit testing; system-in-package; DSU; JTAG; LEON2 processor; PCB test; SIP microcomputer; chip test; embedded control system; post-packaging; system in package; testing system; Electronics packaging; Integrated circuit interconnections; Microcomputers; Packaging; Random access memory; Reliability; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2012 13th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4673-1682-8
Electronic_ISBN :
978-1-4673-1680-4
Type :
conf
DOI :
10.1109/ICEPT-HDP.2012.6474558
Filename :
6474558
Link To Document :
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